Method and device for the production of thin epiatctic semiconductor layers

ABSTRACT

System for producing diffusion-inhibiting epitaxial semiconductor layers, by means of which thin diffusion-inhibiting, epitaxial semiconductor layers can be produced on large semiconductor substrates at a high throughput. The surfaces of the semiconductor substrates to be coated are first cleaned, and the substrates are then heated in a low pressure batch reactor to a first temperature (prebake temperature). The surfaces to be coated are next subjected to a hydrogen prebake operation at a first reactor pressure. In the next step the semiconductor substrates are heated in a low pressure hot or warm wall batch reactor to a second temperature (deposition temperature) lower than the first temperature, and after a condition of thermodynamic equilibrium is reached the diffusion-inhibiting semiconductor layers are deposited on the surfaces to be coated in a chemical gaseous deposition process (CVD) at a second reactor pressure higher than, equal to or lower than the first reactor pressure.

[0001] The invention concerns a method and devices for the production ofthin, preferably diffusion-inhibiting, epitaxial semiconductor layers.

[0002] Epitaxially deposited semiconductor layers, preferably of SiGe orSi, involving high and sharply delimited dopings, are increasingly usedin the production of high frequency devices such as for example1-heterobipolar transistors (HBT) and in CMOS circuits. Those highlydoped layers involve the problem of diffusing out during subsequentprocess steps at elevated temperatures within the technologicalprocedures involved and thus degradation of the electronic properties ofthose layers. In order to minimize those diffusion processes thetemperatures have to be reduced and additional diffusion-inhibitingmaterials have to be employed.

[0003] WO 98/26457 describes how the diffusion of boron in SiGe issignificantly suppressed by the use of an additional, electricallynon-active material, preferably an element from the 4th main group, inparticular carbon, in a concentration of between 10¹⁸ cm⁻³ and 10²¹cm⁻³. The production of those epitaxial diffusion-inhibiting layers,preferably of SiGeC or SiC, is effected by molecular beam epitaxy (MBE)and primarily with chemical gaseous phase deposition (CVD) processes. Asdescribed in T. I. Kamins, D. J. Meyer, Appl. Phys. Lett., 59, (1991)178; W. B. de Boer, D. J. Meyer, Appl. Phys. Lett. 58, (1991) 1286 andB. S. Meyerson, Appl. Phys. Lett. 48 (1986) 797, single-wafer andultra-high-vacuum (UHV) batch reactors are used in conjunction with CVDprocesses. In the case of the single-wafer reactors, it can bedetrimentally observed that those installations do not involve hot wallreactors, in other words in single-wafer reactors the wafers are veryrapidly heated by means of radiant or induction heating, in which caseneither the wafer nor the reactor goes into a condition of thermodynamicequilibrium.

[0004] Because of the necessary low deposition rates in the case of Si-,SiC-, SiGe- and SiGeC-low temperature epitaxy, only a low throughputrate is to be achieved with single-wafer reactors. For typical HBTstacks the throughput rate is for example about 5 wafers per hour. Thatis not economically viable for an industrial process.

[0005] The sole batch reactor which has been known hitherto is an UHVhot wall reactor which operates in the temperature range of between 400°C. and 800° C. and typically at 600° C. In those hot wall reactors thewafers are heated in small batches in a condition of thermodynamicequilibrium, whereby it is admittedly possible to achieve asubstantially better level of temperature homogeneity, but the highexpenditure linked to the UHV process has a disadvantageous effect onthe throughput rate. Thus, all peripheral process times (for examplepumping and flushing sequences, handling of the wafers and so forth) aresubstantially longer than for example with conventional low pressure(LPCVD) installations. Therefore, the throughput rate for typical HBTstacks in the case of that UHV batch reactor is in the range of thesingle-wafer reactors, that is to say about 5 wafers per hour. There isalso the disadvantageous effect that, because of the UHV system, it isnot possible to use very high temperatures (1000° C. and higher) andthus for example in the UHV batch reactor etching and baking processescan only be implemented at low temperatures. The low H₂O/O₂ residualcontent for low temperature epitaxy, which is achieved for UHVinstallations and which is represented as necessary, can also beachieved by suitable measures for non-UHV installations.

[0006] Low pressure (LP) batch reactors were hitherto not used for theproduction of diffusion-inhibiting semiconductor layers, in particularnot those of SiGeC or SiC. The reason for this is on the one hand thefact that the low oxygen and moisture content required by the menskilled in the art for low temperature epitaxy in those installationswas deemed not to be a feasible proposition. On the other hand,depletion effects occur in the gaseous phase in high temperature epitaxyin the batch reactors, and those effects result in inadequatehomogeneity of the deposited layers on the substrates. Therefore singlewafer reactors have gained general acceptance for high temperatureepitaxy (T≧1000° C.). At low temperatures however kinetic effectsdominate and transport-conditioned depletion is of subordinatesignificance in comparison with the influence of temperature homogeneityon layer homogeneity.

[0007] The object of the invention is to propose a method and a device,by means of which thin and in particular thin diffusion-inhibitingepitaxial semiconductor layers can be produced on large semiconductorsubstrates which are usual in the semiconductor art, at a highthroughput rate which is suitable for industrial production for typicalHBT stacks. The invention further seeks to provide that methods anddevices are to guarantee the necessary technological conditions such ashomogenous temperature distribution at a suitable operating temperatureand the necessarily low residual content of oxygen and moisture.

[0008] In accordance with the invention that object is attained in thatfirstly the surfaces to be coated of the semiconductor substrates arecleaned by per se known procedures in a wet chemical process and/or inthe gaseous phase. Suitable procedures for that purpose are for examplea Piranha/SC1/SC2/HF-dip/DI-rinse procedure, a Piranha/SC1/SC2 procedureand/or an HF vapor clean procedure.

[0009] The cleaned semiconductor substrates are then heated in a lowpressure batch reactor to a first temperature (prebake temperature)which is higher than the following method step and, to eliminate oxidefrom the air and other impurities, the surfaces to be coated aresubjected to a hydrogen prebake at a reactor pressure which is equal toor higher than the following method step.

[0010] In the following method step the semiconductor substratespretreated in that way are heated in a low pressure hot or warm wallbatch reactor to a second temperature (deposition temperature) lowerthan the preceding method step and, after attainment of thermodynamicequilibrium, the thin, preferably diffusion-inhibiting, semiconductorlayers are deposited on the surfaces to be coated in a chemical gaseousdeposition process (CVD) at a reactor pressure which is equal to orlower than the preceding method step. In that respect the CVD processtakes place under such conditions that the deposition is controlled bysurface reactions on the substrate and thus gas transport in the lowpressure hot or warm wall batch reactor is of subordinate significance.Those conditions are in particular a low temperature and/or a lowreactor pressure.

[0011] The hydrogen prebake step is preferably effected at a temperaturein the range of between 750 and 1100° C. and at a gas pressure in therange of between 0.1 and 760 torr and epitaxial deposition of thepreferably diffusion-inhibiting semiconductor layer is preferablyeffected at a temperature in the range of between 450 and 800° C. and ata gas pressure in the range of between 0.1 and 100 torr. Particularlypreferred process parameters are set forth in the appendant claims.

[0012] It has been found that the specified method steps and inparticular the specified method parameters make it possible to achievethin layers of adequate homogeneity. The invention is based on therealization that adequate homogeneity of the layers is criticalprecisely in relation to thin layers, in which respect the requirementsin terms of a high throughput rate and a high level of homogeneity arecontradictory. As the diffusion of foreign atoms such as dopants intothin layers is of relatively greater significance than in the case ofthicker layers, a preferred method is one in which a plurality of layersare produced, of which at least one thin layer is ofdiffusion-inhibiting nature.

[0013] Implementation of the method for the production of the thin,diffusion-inhibiting layer is preferably effected in such a way that anelectrically inert, diffusion-inhibiting element such as carbon issubstantially substitutionally introduced into the correspondingsemiconductor layer by epitaxial layer growth. The concentrationachieved in that way of preferably substitutional carbon is preferablyless than 1 atomic % or less than 5*10²⁰ cm⁻³. The particularlypreferred concentration range is between 1*10²⁰ and 5*10²⁰ cm⁻³.

[0014] By way of example methyl silane is suitable as the carbon sourcefor the production of diffusion-inhibiting epitaxial semiconductorlayers, preferably on the basis of SiGeC or SiC.

[0015] The method according to the invention provides that, for theepitaxial deposition of the diffusion-inhibiting semiconductor layersmodified hot wall low pressure batch reactors can be used for thechemical gaseous phase deposition procedure (LPCVD batch reactors), bymeans of which the throughput rate can be increased to about 75 wafersper hour for typical HBT stacks. A crucial point in terms ofapplicability of the LPCVD batch reactors for low temperature epitaxy isa preceding high temperature process step in the form of a hydrogenprebake, whereby air oxide and other impurities are eliminated. In thefollowing low temperature process step, epitaxial deposition of thediffusion-inhibiting semiconductor layers takes place out of the gaseousphase. The procedure according to the invention can both be implementedin such a way that the high temperature and the low temperature processsteps are performed in a single LPCVD batch reactor equipped for thatpurpose, and also in such a way that two separate batch reactors areused for that purpose, which are connected by way of a transfer chamberwith integrated inert gas flushing and/or a vacuum environment.Depending on the respective factors involved therefore it is possible toachieve a further increase in the throughput rate without having totolerate technological losses. The method according to the inventionavoids the disadvantageous influences which can occur as a consequenceof an excessively high oxygen and moisture content and as a consequenceof the occurrence of depletion effects. In addition, further hightemperature treatments such as reactor etching and baking processes arealso possible in that manner within the installation.

[0016] The devices described for carrying out the methods correspond intheir main components, in particular the automatic handling system, thequartz reactor in a resistance-heated heating cassette, the gas supply,the vacuum system and so forth, to modern LPCVD batch reactors. Theinstallation additionally requires a transfer chamber system withintegrated gas flushing and/or with integrated vacuum system, whichmakes it possible to maintain an inert gas or vacuum environment,preferably (in the case of inert gas flushing) using nitrogen with a lowresidual oxygen content (<20 ppm). In that respect the transfer chambersystem serves in one embodiment for the introduction and discharge ofthe semiconductor substrates and in another embodiment it additionallyserves for the transfer of the semiconductor substrates from one reactorto the other. Handling of the semiconductor substrates is thereforeeffected in an inert atmosphere and/or in a vacuum. Besidesimplementation of the actual deposition processes, the entire device isalso suitable for the hydrogen treatment operations at temperatures ofbetween 750° C. and 1100° C., at a pressure of between 0.1 and 760 torrand with a hydrogen flow of between 1 and 200 standard liters perminute. Alternatively there is provided a second reactor system which isintegrated into the main system and which performs that function. Thetwo reactors are connected by way of the above-described transferchamber system to integrated inert gas flushing and/or to an integratedvacuum system.

[0017] Besides being set forth in the claims the features of theinvention are also set forth in the description and the drawings, inwhich respect the individual features each in themselves or inpluralities in the form of sub-combinations represent patentableconfigurations in respect of which protection is claimed here.Embodiments of the invention are illustrated in the drawings and aredescribed in greater detail hereinafter. In the accompanying drawings:

[0018]FIG. 1 is a diagrammatic view of a low pressure batch reactor withtransfer chamber, and

[0019]FIG. 2 is a diagrammatic view of two reactors connected by atransfer chamber.

EXAMPLE 1

[0020]FIG. 1 shows a low pressure batch reactor for chemical gaseousphase deposition, for deposition of the thin in particulardiffusion-inhibiting semiconductor layers. In this embodiment the deviceaccording to the invention comprises a main chamber 1 which contains alow pressure batch reactor 2, a transfer chamber 3 arranged at the mainchamber 1 and a sealingly closing door 4 which is arranged therebetween,as well as a further, sealingly closing door 4 for stocking the transferchamber 3. The main chamber 1 has devices for inert gas flushing and/orfor producing a vacuum and devices for introducing gases into the lowpressure batch reactor 2; those devices include one or more gas sources9 which are connected to the main chamber 1 by way of a controllablevalve 8. A vacuum pump 10 is also connected to the main chamber 1. Tocontrol the inert gas flushing operation, the introduction of gases andproduction of the vacuum, the valves 8 (of which only one is shown byway of example) and the vacuum pump 10 are connected to a control device7. In accordance with the invention, a low pressure reactor 2, for thedeposition of semiconductor layers out of the gaseous phase, issupplemented by conventional devices which make it possible inparticular to implement high temperature process steps at up to 1100° C.In this embodiment the low pressure batch reactor 2 is a quartz reactorin a heating cassette which in particular is resistance-heated. Acorresponding heating arrangement 11 is also connected to the controldevice 7.

[0021] Immediately after the wet-chemical operation of precleaning thesemiconductor substrates, for which purpose for example aPiranha/SC1/SC2/HF-dip/DI-procedure is used, the semiconductorsubstrates are introduced into the nitrogen-flooded transfer chamber 3of the LPCVD installation. They remain there until a sufficiently lowresidual content of oxygen and moisture is achieved in the atmosphere ofthe transfer chamber 3. After transposition of the substrates out of thetransport containers into the reactor boat it is introduced into the lowpressure batch reactor 2.

[0022] In that case, a reduced temperature at a level of for example400° C. obtains in the low pressure batch reactor 2. There then followsa CVD-typical sequence of process steps which primarily differ inrespect of temperature, pressure and gas atmosphere.

[0023] After a stabilization phase the low pressure batch reactor 2 isset in respect of temperature and pressure to values which correspond tothe conditions of the hydrogen prebake step which now follows (forexample 850° C. and 50 torr). The prebake operation is started byheating the wafers to the corresponding prebake temperature in ahydrogen flow of between 1 and 200 standard liters per minute, in thisembodiment about 200 standard liters per minute.

[0024] After the temperature is reduced to a second lower temperaturevalue, for example 600° C. at 200 mtorr, including the necessarystabilization times for attaining thermodynamic equilibrium, the actualoperation of deposition of the diffusion-inhibiting semiconductor layersis effected by introducing the appropriate process gases into the lowpressure batch reactor 2. Preferably a mixed gas comprising hydrogen andfor example SiH₄ or SiH₂Cl₂ and GeH₄ is used for that purpose.Preferably methyl silane is used as the carbon source. In thisembodiment the semiconductor layers contain SiGe and/or Si and, as adiffusion-inhibiting material which significantly suppresses thediffusion of doping substances in Si and/or SiGe, an electricallynon-active element, preferably from the 4th or 6th main group, in thisembodiment carbon. The carbon significantly suppresses in particulartransient enhanced diffusion (TED) of boron in the SiGe. Oxygen or acombination of carbon and oxygen is also suitable as adiffusion-inhibiting material.

[0025] Once again different process-governed temperature and pressurechange operations can take place between the deposition of theindividual layers.

[0026] After the conclusion of all deposition processes the low pressurebatch reactor 2 is flushed clear; the temperature is reduced and thepressure is equalized in the low pressure batch reactor 2 and in thetransfer chamber 3. The procedure is concluded with unloading of thesubstrates.

[0027] This method according to the invention permits a throughput rateof more than 25 wafers per hour for a typical HBT stack.

EXAMPLE 2

[0028]FIG. 2 shows a variant of the reactor system according to theinvention, comprising two main chambers 1 and a transfer chamber 3arranged between the main chambers 1, wherein the main chambers 1 andthe transfer chamber 3 are connected by sealingly closing doors 4 andthe transfer chamber 3 can be stocked through such a door 4. Thetransfer chamber 3 also has an entry lock arrangement 3 a, by way ofwhich the transfer chamber 3 is to be stocked. A transfer between thetwo main chambers 1 is effected later in a transfer region 3 b of thetransfer chamber 3, which is then sealed off with respect to the entrylock arrangement 3 a by a sealingly closing door 4. A low pressure batchreactor 5 and a low pressure hot or warm wall batch reactor 6 arefurther arranged in different main chambers 1. The main chambers 1 havedevices for inert gas flushing and/or for producing a vacuum as well asdevices for the introduction of gases into the low pressure batchreactor 5 and into the low pressure hot or warm wall batch reactor 6.Those devices include gas sources 9 which are connected to therespective main chamber 1 by way of controllable valves 8. Thearrangement further has a respective heating means 11 and a vacuum pump10. The controllable valves 8, the vacuum pumps 10 and the heating means11 are respectively connected to process controls 7 which are of asuitable configuration for carrying out the method described herein. Inaccordance with the invention the low pressure batch reactor 5, for thedeposition of semiconductor layers out of the gaseous phase, issupplemented by conventional devices which make it possible inparticular to implement high temperature process steps at up to 1100° C.In this embodiment the low pressure batch reactor 5 and/or the lowpressure hot or warm wall batch reactor 6 are quartz reactors in arespective heating cassette which in particular is resistance-heated.

[0029] The hydrogen prebake operation and epitaxial deposition of thediffusion-inhibiting semiconductor layers are effected in thisembodiment in separate reactors as shown in FIG. 2. For that purpose,after conclusion of the hydrogen prebake operation, the semiconductorsubstrates are transferred from the first low pressure batch reactor 5by way of the transfer region 3 b of the transfer chamber 3 with theintegrated inert gas flushing means into the second low pressure hot orwarm wall batch reactor 6. That makes it possible to achieve anincreased throughput rate. With this mode of operation, the technicaldemands made on the two batch reactors 5, 6 are lower. In this casealso, the required times for stabilization of the ambient atmosphere inthe transfer chamber 3 and in the second low pressure hot or warm wallbatch reactor 6 are to be observed in accordance with the methodaccording to the invention as discussed herein. In addition the lowpressure batch reactor 5, the low pressure hot or warm wall batchreactor 6 and at least the transfer region 3 b of the transfer chamber 3must have a low moisture partial pressure.

[0030] Both the embodiments have a control 7 which is not shown indetail herein and which terminates a respective deposition process whena predetermined layer thickness of between 10 and 1000 nm is attainedfor the respective semiconductor layer. For the production of thin,diffusion-inhibiting semiconductor layers, the reactors 2 and 5respectively also have devices 8 and 9 for the introduction of gasesinto the low pressure batch reactors 2 or 5 and a control device 7 whichis connected thereto and which is adapted for the introduction of methylsilane in a predetermined dosage.

[0031] The control device 7 is also connected to a vacuum pump 10 forevacuation of the reactors 2 or 5 and to a heating means 11 forproducing the required process temperatures. The desired processpressures can also be set by the control device 7, by means of thevacuum pump 10 and the devices 8 and 9 for the introduction of gases.The devices 8 and 9 for the introduction of gases may for exampleinclude one or more gas bottles 9 and a corresponding number ofcontrollable valves 8.

[0032] In the present description a method for the production ofdiffusion-inhibiting semiconductor layers and devices for carrying outthat method have been described by reference to specific embodiments byway of example. It should be noted however that the present invention isnot limited to the details of the description in the embodiments by wayof example as modifications and alterations are claimed within the scopeof the claims.

What is claimed is:
 1. A method for the production of thin epitaxial semiconductor layers, characterized in that: a) there are provided a plurality of semiconductor substrates of a diameter of at least 150 mm and having surfaces to be coated, for simultaneous treatment in a low pressure batch reactor (2, 5), b) the surfaces to be coated of the semiconductor substrates are cleaned by a wet chemical process or in the gaseous phase or both, c) the cleaned semiconductor substrates are heated in the low pressure batch reactor (2, 5) to a first temperature (prebake temperature) and the surfaces to be coated are subjected to a hydrogen prebake operation at a first reactor pressure d) the semiconductor substrates are heated in a low pressure hot or warm wall batch reactor (2, 6) to a second temperature (deposition temperature) lower than the first temperature (prebake temperature), and after attainment of a condition of thermodynamic equilibrium the semiconductor layers are deposited on the surfaces to be coated in a chemical gaseous deposition (CVD) process at a second reactor pressure equal to or lower than the first reactor pressure, and e) the CVD process is effected under such conditions that deposition is controlled by surface reactions on the substrate and thus gas transport in the low pressure hot or warm wall batch reactor (2, 6) is of subordinate significance, f) wherein the deposition of a semiconductor layer is controlled in such a way that deposition of a thin epitaxial semiconductor layer ends when the thin epitaxial semiconductor layer has reached a predetermined thickness of between 10 nm and 1000 nm.
 2. A method as set forth in claim 1, wherein the semiconductor layers may be the same or different materials.
 3. A method as set forth in claim 1 characterized in that at least one of the semiconductor layers produced is a diffusion-inhibiting semiconductor layer so as to inhibits the diffusion of foreign atoms into any of the layers.
 4. A method as set forth in claim 3 characterized in that introduced into the thin diffusion-inhibiting layer is a diffusion-inhibiting material for suppressing the diffusion of doping substances in Si or SiGe or both and in that the material used as the diffusion-inhibiting material is electrically non-active.
 5. A method as set forth in claim 4 characterized in that the diffusion-inhibiting material is carbon.
 6. A method as set forth in claim 5 characterized in that the carbon diffusion-inhibiting layer is deposited out of the gaseous phase and methyl silane is used as the carbon source.
 7. A method as set forth in claim 4 characterized in that the diffusion-inhibiting material is oxygen.
 8. A method as set forth in one of claim 1 characterized in that the conditions under which the CVD process takes place are a low temperature or a low reactor pressure or both.
 9. A method as set forth in one of claim 3 characterized by in that the diffusion-inhibiting element is present in the semiconductor layer substitutionally in a concentration of between 1*10²⁰ and 5*10²⁰ cm⁻³.
 10. A method as set forth in one of claim 1 characterized in that the hydrogen prebake operation and epitaxial deposition of the thin semiconductor layers are effected in one and the same low pressure batch reactor (2).
 11. A method as set forth in one of claim 1 characterized in that the hydrogen prebake operation is effected in a first low pressure batch reactor (5) for high temperature processes and the epitaxial deposition of the thin semiconductor layers is effected in a second low pressure hot or warm wall batch reactor (6) for low temperature processes and that transfer of the semiconductor substrates from the first low pressure batch reactor (5) into the second low pressure hot or warm wall batch reactor (6) is effected in an inert atmosphere or in a vacuum or both.
 12. A method as set forth in one of claim 1 characterized in that the hydrogen prebake operation is effected at a temperature in the range of between 750 and 1100° C. and at a gas pressure in the range of between 0.1 and 760 torr and in that epitaxial deposition of the diffusion-inhibiting semiconductor layer is effected at a temperature in the range of between 450 and 800° C. and at a gas pressure in the range of between 0.1 and 100 torr.
 13. A method as set forth in claim 12 characterized in that the hydrogen prebake operation is effected at a temperature in the range of between 900 and 1000° C.
 14. A method as set forth in claim 12 characterized in that the hydrogen prebake operation is performed at a gas pressure in the range of between 0.5 and 1 torr.
 15. A method as set forth in one of claim 12 characterized in that epitaxial deposition of the diffusion-inhibiting semiconductor layer is effected at a temperature in the range of between 600 and 700° C., and at a gas pressure in the range of between 0.3 and 1 torr.
 16. A method as set forth in one of claim 1 characterized in that in the CVD process SiH₄ or SiH₂Cl₂ and GeH₄ is used as a mixed gas on a hydrogen basis.
 17. A method as set forth in one of claim 1 characterized in that the hydrogen prebake operation is effected at a gas through flow rate of between 1 and 200 standard liters/minute.
 18. A method as set forth in one of claim 1 characterized in that wet-chemical cleaning of the surfaces to be coated is effected in accordance with a Piranha/SC1/SC2/HF-dip/DI-rinse procedure or in accordance with a Piranha/SC1/SC2 procedure or both.
 19. A method as set forth in one of claim 1 characterized in that wet-chemical cleaning of the surfaces to be coated is effected in accordance with an HF vapor clean procedure.
 20. A method as set forth in one of claim 1 characterized in that the semiconductor layers contain SiGe or Si or both.
 21. A device for carrying out the method as set forth in claim 1 characterized by a main chamber (1) containing a low pressure batch reactor (2), a transfer chamber (3) arranged at the main chamber (1), and a sealingly closing door (4) disposed between them, as well as a further sealingly closing door (4) for stocking the transfer chamber (3).
 22. A device as set forth in claim 21 characterized in that the main chamber (1) has devices for inert gas flushing or for the production of a vacuum or both and devices for the introduction of gases into the low pressure batch reactor (2).
 23. A device as set forth in claim 21 characterized in that the low pressure batch reactor (2) is a quartz reactor in a heating cassette of a resistance-heated type.
 24. A device for carrying the method as set forth in claim 1 characterized by two main chambers (1) and a transfer chamber (3) arranged between the main chambers (1), wherein the main chambers (1) and the transfer chamber (3) are connected by sealingly closing doors (4) and the transfer chamber (3) can be stocked through such a door (4), wherein a low pressure batch reactor (5) and a low pressure hot or warm wall batch reactor (6) are arranged in different main chambers (1).
 25. A device as set forth in claim 24 characterized in that the main chambers (1) have devices for inert gas flushing or for the production of a vacuum or both and devices for the introduction of gases into the low pressure batch reactor (5) and into the low pressure hot or warm wall batch prebaker (6).
 26. A device as set forth in claim 24 characterized in that the low pressure batch reactor (5) or the low pressure hot or warm wall batch reactor (6) or both are quartz reactors in a respective heating cassette of a resistance-heated type.
 27. A device as set forth in claim 22 characterized in that devices for the introduction of gases include a connection for a source for methyl silane in the gaseous phase and a control device adapted so that the production of the thin diffusion-inhibiting epitaxial semiconductor layer is effected in such a way that the semiconductor layer has a concentration of the diffusion-inhibiting element of between 1*10¹⁸ cm⁻³ and 1*10²¹ cm⁻³. 